Five-Stage RISC-V
Processor Core
A 32-bit processor with data forwarding, hazard detection, and branch recovery. Verified against an independent Python reference model.
17,848 retired instructions checked
Mayank Neupane / Computer Engineering
I’m a Computer Engineering student at York University, working across software, digital hardware, and the connections between them.
A 32-bit processor with data forwarding, hazard detection, and branch recovery. Verified against an independent Python reference model.
A modular C application for employee records, performance ranking, binary storage, and SQL export. Benchmarked using up to 10,000 records.
Integrated digital control, hardware communication, soldering, and waveform debugging to build and verify an FPGA-controlled vehicle.
Recreated the game with movement physics, collision detection, and interactive gameplay. Play the browser version or explore the implementation.
Developed two versions of an automated watering system with live monitoring and real-time data representation.
LET’S CONNECT
I’d like to hear about engineering and technology opportunities.