mn.

Mayank Neupane / Computer Engineering

Building systems.
Understanding
every layer.

I’m a Computer Engineering student at York University, working across software, digital hardware, and the connections between them.

Toronto, Ontario · Software + hardware
WORKING WITHC / C++PythonSystemVerilogSQLLinuxGit

Selected work

05 PROJECTS / HARDWARE & SOFTWARE
01 / PROCESSOR DESIGNRV32I

Five-Stage RISC-V
Processor Core

A 32-bit processor with data forwarding, hazard detection, and branch recovery. Verified against an independent Python reference model.

48 benchmarks passed · 3 targeted regressions
17,848 retired instructions checked
SystemVerilog · Python · Verilator · GitHub Actions
02 / SYSTEMS SOFTWAREC + SQL

Employee Performance
Management System

A modular C application for employee records, performance ranking, binary storage, and SQL export. Benchmarked using up to 10,000 records.

10,000 records · 0.458 ms search · 0.925 ms sort
Local median measurements · warm-cache conditions
C · SQL · Linux · Benchmarking
03 / EMBEDDED HARDWAREFPGA

FPGA-Controlled Vehicle

Integrated digital control, hardware communication, soldering, and waveform debugging to build and verify an FPGA-controlled vehicle.

SystemVerilog · Hardware communication · 3D modeling
04 / INTERACTIVE SOFTWAREPYTHON

Flappy Bird

Recreated the game with movement physics, collision detection, and interactive gameplay. Play the browser version or explore the implementation.

Python · Pygame · Game logic
05 / HARDWARE INTEGRATIONJAVA + MATLAB

Automated Plant
Watering System

Developed two versions of an automated watering system with live monitoring and real-time data representation.

Java · MATLAB · Live data processing

LET’S CONNECT

Have something in mind?

I’d like to hear about engineering and technology opportunities.

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